Zareena Hassanbee - will present the research conducted by Katarzyna Stokeley, the Oxford Instruments Plasma Technology Development Etch Manager.

Ms Zareena Hassanbee is an Application Engineer with the Etch Development Team at Oxford Instruments Plasma Technology. She holds a master’s degree in VLSI and Embedded Systems from Reva University. Her expertise lies in the study and enhancement of Silicon Carbide (SiC) surface quality using advanced plasma technology. Her work includes developing chamber clean recipes and process flow for processes such as Plasma Polish Dry Etch (PPDE), a patented non-destructive SiC surface smoothing technique by Oxford Instruments. Additionally, she is involved in projects focused on the removal of sub-surface damage on CMP SiC and the characterisation of these effects using Electron Backscatter Diffraction (EBSD).

Title: Corners shaping of low dimensional SiC trenches by plasma processing

Data: Wednesday, September 30, 2026, 4:00 - 6:00 pm JST
Location: Poster-B (4th Floor, G401+G402)

Silicon carbide (SiC) MOSFETs are enabling higher-efficiency power electronics, but device performance depends heavily on precise trench geometry. This work demonstrates how plasma processing in the Oxford Instruments PlasmaPro 100 Cobra 300 system can be used to control the shape of 1 µm deep SiC trenches, eliminating micro-trenches and producing smooth sidewalls.

By optimising fluorine-based passivation and passivation removal processes, researchers achieved precise control over trench corner profiles, ranging from pointed to nearly rounded shapes. These U-shaped trench structures help reduce electric field concentration, improve gate oxide reliability, and enhance overall device performance, supporting the development of more advanced SiC power semiconductor technologies.